Implementations

From The fun Wiki

Revision as of 09:59, 8 August 2022 by Hamster (talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Jump to navigation Jump to search

This page lists the known implementations of fun processors and SoCs.

List of fun cores

Kiskadee

A simple multicycle graph-reducer CPU.

Blackbird

High-bandwidth memory interface.

CPU

SoC

Blackbird-II

fun graph reducer in a 3-stage pipeline.

Caracara

under development

Retrieved from "http://wiki.fun-arch.org/index.php?title=Implementations&oldid=182"