Difference between revisions of "Implementations"
Jump to navigation
Jump to search
| Line 11: | Line 11: | ||
High-bandwidth memory interface. | High-bandwidth memory interface. | ||
| − | + | ==== CPU ==== | |
[[File:Bbird.png |300px|frameless|Blackbird]] | [[File:Bbird.png |300px|frameless|Blackbird]] | ||
| + | ==== SoC ==== | ||
[[File:BBSOC.png |300px|frameless|Blackbird SoC]] | [[File:BBSOC.png |300px|frameless|Blackbird SoC]] | ||
Revision as of 09:55, 8 August 2022
This article is a stub, and is currently a work in progress
List of fun cores
Kiskadee
A simple multicycle graph-reducer CPU.
Blackbird
High-bandwidth memory interface.
CPU
SoC
Blackbird-II
fun graph reducer in a 3-stage pipeline.
Caracara
under development