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<strong>The ''fun'' Functional Programming Instruction-set Architecture</strong> | <strong>The ''fun'' Functional Programming Instruction-set Architecture</strong> | ||
| − | ''fun'' is an instruction-set architecture (ISA) | + | ''fun'' is an open-specification instruction-set architecture (ISA) for structured combinator graph reduction, originally developed at the [https://english.seiee.sjtu.edu.cn School of Electronic Information and Electrical Engineering] of [http://www.sjtu.edu.cn Shanghai Jiao Tong University]. Its goal is to bring functional programming down to the architecture layer, avoiding the inconveniences and troubles of imperative programming that plague conventional ISAs. |
This wiki is intended to provide information about ''fun'', its implementations, as well as programming examples, functional pearls, and more. | This wiki is intended to provide information about ''fun'', its implementations, as well as programming examples, functional pearls, and more. | ||
| Line 8: | Line 8: | ||
== Getting started == | == Getting started == | ||
| − | * [ | + | * [[About fun]] |
| − | * [ | + | * [[关于 fun]] |
| − | * [ | + | * [http://www.fun-arch.org/files/fun-manual.pdf ISA Specification (early draft)] + [https://github.com/fun-isa/fun-spec Github] (Don't mind the short spec! We'll update it soon.) |
| − | * [ | + | * [[Combinator Pearls | Examples and Pearls]] |
| − | * [ | + | * [[Tools]] |
| − | * [https://wiki.fun-arch.org/ | + | * [[Benchmarking]] |
| + | |||
| + | * [[Implementations]] | ||
| + | |||
| + | == News == | ||
| + | |||
| + | * 2022-08-09: Our [[Publications | paper]] "Structured Combinators for Efficient Graph Reduction" has been accepted for publication on IEEE Computer Architecture Letters. | ||
| + | |||
| + | * 2022-07-20: The github repository is now [https://github.com/fun-isa online]. | ||
| + | |||
| + | * 2022-07-08: Our [[Publications | paper]] "Architectural Support for Functional Programming" has been accepted for presentation at [https://vlsisoc2022.com/ VLSI-SoC] to be held in Patras, Greece. 我们的论文“Architectural Support for Functional Programming”已被接受，并将在希腊帕特拉斯举行的VLSI-SoC博士生论坛上发表。 | ||
| + | |||
| + | * 2022-04-25: This wiki is online. | ||
| + | |||
| + | == Community == | ||
| + | |||
| + | Contributions are welcome! | ||
| + | |||
| + | Send a message to <join at fun-arch.org> for joining our mailing list. | ||
| + | |||
| + | * [https://github.com/fun-isa Github] | ||
| + | |||
| + | * [[Publications | Publications and Presentations]] | ||
| + | |||
| + | * [[Code of Conduct]](贡献者公约) | ||
| + | |||
| + | [[File:logo-sjtu-red.png|200px|frameless|SJTU]] | ||
| + | [[File:logo-batc.png|200px|frameless|SJTU]] | ||
Latest revision as of 09:59, 17 August 2022
The fun Functional Programming Instruction-set Architecture
fun is an open-specification instruction-set architecture (ISA) for structured combinator graph reduction, originally developed at the School of Electronic Information and Electrical Engineering of Shanghai Jiao Tong University. Its goal is to bring functional programming down to the architecture layer, avoiding the inconveniences and troubles of imperative programming that plague conventional ISAs.
This wiki is intended to provide information about fun, its implementations, as well as programming examples, functional pearls, and more.
Getting started
- ISA Specification (early draft) + Github (Don't mind the short spec! We'll update it soon.)
News
- 2022-08-09: Our paper "Structured Combinators for Efficient Graph Reduction" has been accepted for publication on IEEE Computer Architecture Letters.
- 2022-07-20: The github repository is now online.
- 2022-07-08: Our paper "Architectural Support for Functional Programming" has been accepted for presentation at VLSI-SoC to be held in Patras, Greece. 我们的论文“Architectural Support for Functional Programming”已被接受，并将在希腊帕特拉斯举行的VLSI-SoC博士生论坛上发表。
- 2022-04-25: This wiki is online.
Community
Contributions are welcome!
Send a message to <join at fun-arch.org> for joining our mailing list.
- Code of Conduct(贡献者公约)
