Difference between revisions of "Implementations"
Jump to navigation
Jump to search
(One intermediate revision by the same user not shown) | |||
Line 1: | Line 1: | ||
− | This | + | This page lists the known implementations of fun processors and SoCs. |
= List of fun cores = | = List of fun cores = | ||
Line 14: | Line 14: | ||
[[File:Bbird.png |300px|frameless|Blackbird]] | [[File:Bbird.png |300px|frameless|Blackbird]] | ||
− | ==== SoC ==== | + | ==== [[Tools | SoC]] ==== |
[[File:BBSOC.png |300px|frameless|Blackbird SoC]] | [[File:BBSOC.png |300px|frameless|Blackbird SoC]] | ||
Latest revision as of 09:59, 8 August 2022
This page lists the known implementations of fun processors and SoCs.
List of fun cores
Kiskadee
A simple multicycle graph-reducer CPU.
Blackbird
High-bandwidth memory interface.
CPU
SoC
Blackbird-II
fun graph reducer in a 3-stage pipeline.
Caracara
under development